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Chip-Select Generator
memory read or off-board memory is read, provided that it is not mapped to an address
valid on board. It is the user ’s responsibility to avoid such errors.
5.5
Chip-Select Generator
The memory controller of the MPC8272 is used as a chip-select generator to access
on-board (and off-board) memories, saving boards’ area, reducing cost and power
consumption, and increasing flexibility. To enhance off-board application development,
memory modules (including the BCSRx) may be disabled by using BCSR 1 in favor of an
external memory connected via the expansion connectors. That way, a CS line may be used
off-board via the expansion connectors while its associated local memory is disabled.
When a CS region assigned to a buffered 2 memory is disabled by using BCSR, the local
data transceivers are disabled during access to that region, avoiding possible 3 contention
over data lines.
The MPC8272 chip-select assignments to the various memories / registers on the
MPC8272ADS are shown in Table 5-5.
Table 5-5. MPC8272ADS Chip Select Assignments
Chip Select:
CS0
CS1
CS2
CS3
CS4
CS5
CS6
Assignment
Flash SIMM / E 2 PROM 1
BCSR
SDRAM
PCI Interrupt Controller
E 2 PROM / Flash SIMM a
ATM UNI Microprocessor I/F
Communication Tool M/P
Bus
60X (Buffered)
60X (Buffered)
60X (Main)
60X (Buffered)
60X (Buffered)
60X (Main)
60X (Buffered)
Timing Machine
GPCM
GPCM
SDRAM Machine 1
GPCM
GPCM
GPCM
GPCM/UPMx
Interface CS1.
CS7
Communication Tool M/P
60X (Buffered)
GPCM/UPMx
Interface CS2.
5.6
1
Selection is done by a dip-switch.
Synchronous DRAM (60X Bus)
To enhance performance, especially in higher operation frequencies, 64Mbytes of SDRAM
are provided on board. The SDRAM is unbuffered from the MPC8272 60X bus. Use is
1 After
the BCSR is removed from the local memory map, there is no way to access it but to re-apply power
to the MPC8272ADS.
2 When an unbuffered CS region is being accessed, buffers do not open anyway.
3 During read cycles.
Chapter 5. Module Design
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